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[Other resource] fpu

Description: 利用FPGA实现浮点运算的verilog代码 希望能够给需要做这方面研究的同仁有所帮助-use FPGA floating-point operations verilog code hope to be able to do this to the need for research in the Tongren help
Platform: | Size: 130142 | Author: jake | Hits:

[Other resource] flowadd

Description: verilog编写的32位浮点加法器-32-bit Floating Point Addition Written in Verilog
Platform: | Size: 1442 | Author: 张桓铭 | Hits:

[VHDL-FPGA-Verilog] 32divider

Description: 32位元2進位除法器 -32-bit binary divider 2
Platform: | Size: 2048 | Author: chen | Hits:

[VHDL-FPGA-Verilog] adder_32

Description: 超前进位加法器是通常数字设计所必备的，本程序为32位超前进位加法器-CLA is usually necessary for digital design, the procedure for 32-bit CLA
Platform: | Size: 1024 | Author: zhaohongliang | Hits:

[File Format] floatmul

Description: 用verilog实现三十二位浮点数算法，通过状态机的方法实现。-32 floating-point implementation using verilog algorithm, the method adopted by the state machine implementation.
Platform: | Size: 1024 | Author: 尹小怡 | Hits:

[source in ebook] fadd

Description: it is verilog code for floating point adder
Platform: | Size: 1024 | Author: vijay | Hits:

[Embeded-SCM Develop] floating_point_verilog

Description: verilog写的浮点运算加法，希望对大家有用处-verilog to write floating point addition, we want to be useful
Platform: | Size: 1024 | Author: dupengcheng | Hits:

[VHDL-FPGA-Verilog] caiheng

Description: 利用Verilog实现32位浮点数的乘法,并且已通过验证.-Using Verilog to achieve 32-bit floating point multiplication, and has been verified.
Platform: | Size: 6144 | Author: 蔡恒 | Hits:

[Other] float_add

Description: 该程序是用Verilog语言写的，可以完成（1，5，9）格式的浮点数相加。-The program is written in Verilog, you can complete the (1,5,9) add floating-point format.
Platform: | Size: 1788928 | Author: 陈晓 | Hits:

[VHDL-FPGA-Verilog] fpu_sub

Description: verilog code floating point subtraction
Platform: | Size: 1024 | Author: Nikhil | Hits:

[VHDL-FPGA-Verilog] fpuvhdl_latest

Description: the code describle a floating point adder with verilog
Platform: | Size: 133120 | Author: frank | Hits:

[VHDL-FPGA-Verilog] rgb2yuv1

Description: 这个主要是实现RGB和YUV两种色彩空间的转换，其中用到的主要思想是，verilog语言中的浮点乘法怎么运算，流水线的思想。-This is achieved mainly two kinds of RGB and YUV color space conversion, which uses the main idea is, verilog language how floating point multiplication operations, lines of thought.
Platform: | Size: 1088512 | Author: 张元甲 | Hits:

[VHDL-FPGA-Verilog] campur

Description: total added value for 6 data in 32bit floating point for verilog code
Platform: | Size: 3072 | Author: hafiez | Hits:

[VHDL-FPGA-Verilog] 6data-power2verilog

Description: verilog code (power two) for 6 data entry in 32bit floating point
Platform: | Size: 1024 | Author: hafiez | Hits:

[VHDL-FPGA-Verilog] count-for-6-data

Description: count data entry for 6 data and convert to 32bit floating point in verilog code.
Platform: | Size: 1024 | Author: hafiez | Hits:

[VHDL-FPGA-Verilog] add

Description: 浮点加法器的用Verilog实现，32位的浮点加法器-Floating point adder Verilog
Platform: | Size: 1654784 | Author: 王轩 | Hits:

[VHDL-FPGA-Verilog] floating_point_multiplier_verilog

Description: This code has written in verilog and it can multiply two floating point number with IEEE 754 standards and the out put of this code is in IEEE 754 standard.We have to put input in binary and the out put is also in binary.
Platform: | Size: 1024 | Author: sajad | Hits:

[VHDL-FPGA-Verilog] FP_adder

Description: 32 bit floating point adder with testbench
Platform: | Size: 11264 | Author: liki20 | Hits:

[VHDL-FPGA-Verilog] FP_divider

Description: floating point divider for 32 bit with test bench
Platform: | Size: 11264 | Author: liki20 | Hits:

[VHDL-FPGA-Verilog] float_mult32x32.v

Description: verilog 语言写的FPGA内部实现硬件浮点乘法器的源码，两个时钟周期完成一次浮点乘法运算(The FPGA language written in Verilog implements the source of the hardware floating point multiplier, and completes the floating point multiplication operation in two clock cycles.)
Platform: | Size: 1024 | Author: orangell | Hits:
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